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C Routines for the AVR Microcontroller/AT17LVxxx ISP Code
(4 pages, updated 7/02)
This Application Note describes how to In-System Program (ISP) an Atmel FPGA Configuration Memory (Configurator) using an Atmel AVR Microcontroller and how to "bit-bang" the industry standard 2-wire protocol. |
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Cascaded Programming Circuits using AT17(A) Configurators with Atmel, Xilinx® and Altera® FPGAs
(3 pages, updated 5/04)
This Application Note provides the cascaded Programming circuits of AT17 Series devices for Atmel, Xilinx, and Altera FPGAs. |
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Drop-In/Stand-alone Programming Circuits for AT17 Series Configurators with Atmel and Xilinx® FPGAs
(4 pages, updated 3/04)
This Application Note provides the drop-in/stand-alone Programming circuits of AT17 Series devices for Atmel and Xilinx FPGAs. |
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Drop-In/Stand-alone Programming Circuits for AT17A Series Configurators with Altera® FPGAs
(4 pages, updated 3/04)
This Application Note provides the drop-in/stand-alone Programming circuits of AT17 Series devices for Atmel and Altera FPGAs. |
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In-System Programming Circuits for AT17 Series Configurators with Atmel and Xilinx® FPGAs
(5 pages, updated 3/04)
This Application Note provides the In-System Programming (ISP) circuits of AT17 Series devices for Atmel and Xilinx FPGAs. |
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In-System Programming Circuits for AT17A Series Configurators with Altera® FPGAs
(4 pages, updated 3/04)
This Application Note provides the In-System Programming (ISP) circuits of AT17 Series devices for Atmel and Altera FPGAs. |
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Introducing Atmel AT17LV Series FPGA Configuration Memories
(9 pages, updated 9/02)
How to select which device the correct circuit and a programming method. |
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Programming Atmel's EEPROMs: AT17LV020(A) vs AT17LV002(A)
(5 pages, updated 7/01)
Differences in structure and in programming the AT17C/LV020(A) and the AT17C/LV002(A). |
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Programming Specification for AT17F(A) Series FPGA Configuration Memories
(18 pages, revision D, updated 3/05)
This Application Note provides details of the serial bus protocol and device features used for in-system programming (ISP). The included reference schematics are applicable to users of the CPS programming utility as well. |
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Programming Specification for AT17N Series FPGA Configuration Memories
(15 pages, updated 05/03)
Programming specification for AT17N256/512/010/002/040 FPGA configuration memories. |
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Programming Specification for Atmel's AT17LV(A) Series FPGA Configuration EEPROMs
(18 pages, updated 5/03)
This Application Note provides details of the serial bus protocol and device features used for in-system programming (ISP). The included reference schematics are applicable to users of the CPS programming utility as well. |
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AT18F Series Configuration Memory Application Note
(6 pages, revision A, updated 4/08)
This application note describes the application circuit and programming method in using the Atmel AT18F Series Configuration Memories. |
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AVR301: C Code for Interfacing AVR® to AT17CXXX FPGA Configuration Memories
(20 pages, revision D, updated 01/04)
This Application Note describes how to In-System-Program (ISP) and Atmel FPGA Configuration Memory using an Atmel AVR MCU and how to bit bang TWI using port pins on an AT90S8515 AVR MCU |
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Programming Circuits for AT17F Series Configurators with Xilinx® FPGAs
(11 pages, revision A, updated 04/06)
This Application Note provides the In-System Programming (ISP) and drop-in/stand-alone programming circuits of AT17F Series devices for Xilinx FPGAs. |
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Programming Circuits for AT17FA Series Configurators with Altera® FPGAs
(12 pages, revision A, updated 05/06)
This Application Note provides the In-System Programming (ISP) and drop-in/stand-alone programming circuits of AT17FA Series devices for Altera FPGAs. |
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